Packialakshmi K Email and Phone Number
Design Verification Engineer
at
Innovative Logic
Packialakshmi K Company Details
Company
Location
San Jose, California, United States
Website
Industry
Semiconductors
Packialakshmi K's Current Company
Innovative Logic
Industry | Semiconductors | |
Location | San Jose, California, United States |
Industry | Semiconductors | |
Location | San Jose, California, United States |
Packialakshmi K's Experience and Education
Design Verification Engineer
2019-10 to Unknown
San Jose, California, United States
Intern At Relicuus Semiconductor
Design And Verification Intern At Relicuus Semiconductor Pvt.Ltd
2018-12 to 2019-09
Frequently Asked Questions about Packialakshmi K
What company does Packialakshmi K work for?
Packialakshmi K works for Innovative Logic
What is Packialakshmi K's role in his workplace?
Packialakshmi K's role in his workplace is
Design Verification Engineer .
Which industry does Packialakshmi K work in currently?
Packialakshmi K works in the industry
Semiconductors.
What schools did Packialakshmi K attended?
Packialakshmi K attended
Ramco Institute Of Technology.
What are some of Packialakshmi K's skills?
Packialakshmi K has skills like
Leadership,
Systemverilog,
Programming,
Axi,
Verilog,
Aldec Riverio Bro,
Usb3.0,
Apb,
Universal Verification Methodology,
and
Object Oriented Programming.
Who are Packialakshmi K's colleagues?
Packialakshmi K's colleagues are
Manogna John,
Medini P,
Satish D,
James Hemeon,
Ter Yuan Lee,
Sujana M,
and
Cecile Mintu.
Who are Packialakshmi K's peers at other companies?
Packialakshmi K's peers at other companies are
Kiran Adduri,
Ketan Patil,
Shiva Indrakanti,
Avinash Chenchala,
Sindhura Ketineni,
Sung Ta Tsai,
and
Imtiyaz Rahman.