Milind Parab

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Sr. Principal Software Engineer At Cadence Design Systems @ Cadence Design Systems
sweden

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cadence.se

Cadence Design Systems

Sr. Principal Software Engineer At Cadence Design Systems
sweden
Website:
cadence.se
Employees:
10

Milind Parab Work Experience Details

  • cadence.se
    Sr. Principal Software Engineer
    Cadence Design Systems Apr 2019 - Present
    Pune Area, India
    Embedded Systems, Peripheral Drivers, Validation
  • cadence.se
    General Manager, Cri (Center For Research And Innovation)
    Havells India Ltd Nov 2017 - Mar 2019
    Noida Area, India
    IoT integration in Consumer products - Embedded Systems, Architecture, Design, Optimization, Manufacturing, Production support.
  • cadence.se
    Consultant
    Bangalore
  • cadence.se
    Ceo/Engineering
    Chipmonk Technologies Jan 2011 - Dec 2016
    Bangalore
    Entrepreneur, Co-Founder and CEOChipmonk created M2M/IoT products and solutions, offering Software as a Service (SaaS) and Platform as a Service (PaaS) in Industrial IoT space. Created IoT solution (named OLLO™) for Industrial Process Monitoring, predictive maintenance, Analysis and Optimization. Build the startup operations from scratch. Developed business plans, worked on fund raising, debt planning and equity investments, managed statutory and regulatory compliances with close tracking on expenses ensuring low cash burn rate.Created organization structure as is deemed necessary for a Product Company with eye on short term impacts and long term sustenance plan. Did segregation of what should be done in-house and made partnerships with suppliers and sub-contractors.Creating product roadmap and marketing strategy and execution plan. Defined Product specification, resource planning, defined use cases/customer expectation, priorities and releases. Hired and trained teams for product development (SW/HW), installations and customer support
  • cadence.se
    Sr. Chief Engineer/Manager (Sdm)
    Samsung India Software Operations Oct 2005 - Dec 2010
    Bangalore
    Major Project Highlights Design of an IrDA controller. Micro-architecture, algorithms and digital logic, RTL design, synthesis and SoC integration. This IP was initially synthesized on 90nm node and later on integrated for two major Japanese Foundry customers. Work continued on customizing for higher technology nodes.Design of JPEG/JPEG-XR Encode/Decode IP Core. Feasibility analysis, micro-architecture, defining product specification/requirements. Architecture for Pre-filters Module. JPEG-XR uses overlapped pre-filter before core transform. The pre-filter design/implementation is under patent filing Design of Multi-protocol Serial peripheral. The protocols integrated are UART, I2S, AC97, I2C, SPI, PCM and IrDA. Feasibility analysis and architecture. Samsung received two patents on MPSI architecture. Also we received Award of Merit in Samsung Worldwide Paper Conference 2009 for the MPSI concept.
  • cadence.se
    Technical Lead/Manager
    Texas Instruments Mar 2004 - Oct 2005
    Bangalore
    Worked on baseband signal processing core implementation for Hardware Demodulator for DVB-H (Digital Video Broadcast) and ISDB-T (Integrated Services Digital Broadcasting – Terrestrial) standards. This was a Co-processor implementation integrated in ARM architecture. Worked on co-processor verification, writing test-benches and firmware implementation.At TI has also worked in Imaging and Audio group. Was responsible for system power management and integration for a range of Digital Multimedia platform SoC based reference designsWorked on TI imaging cores. Was responsible for Requirements definition to final integration and testing plan. Did Power management for imaging core and integrating the power management scheme into the Software Framework. Also worked on Digital Still Camera Reference Design porting
  • cadence.se
    Avedis Microsystems
    System Architect Jul 2002 - Jan 2004
    As Principal Engineer for Multimedia group at Avedis Microsystems worked on MP3 decoder, MP3-PRO decoder, and MPEG4 hardware accelerators like Motion estimation and DCT/IDCT blocks. Also did IP roadmap for Short range wireless. At Avedis worked briefly on IEEE802.15.3 OFDM baseband.MPEG4 Hardware Accelerators Motion Estimation and DCT/IDCT were implemented as hardware accelerators for a DSP based MPEG4 platformMP3pro First developed MP3 core which was then extended with PRO functionality. IEEE802.15.3 OFDM WLAN baseband implementation support: This project was secured as a common development roadmap with risk sharing and co-ownership of Intellectual Property. Consulted in the initial design phase for OFDM transceiver chain implementation for IEEE802.15.3
  • cadence.se
    System Architect
    Bluefont Technologies Pvt. Ltd. Oct 2000 - Jul 2002
    5GHz OFDM WLAN Baseband transceiver implementation: Started with MATLAB simulation of the complete PHY transceiver (IEEE802.11and HiperLAN2). The MATLAB model was then converted to Fixed point C model. The C model was used generating the test vector in compliance with the standard and also for fixing the accumulator ranges and number of bits of computations required at each step to ensure required compliance. A 32 bit RISC processor (ARC Tagent A4) was used as a control processor. The baseband frequency was fixed to 60MHz. The most complex blocks (time and space) for implementation in the transceiver chain were Receiver synchronization, Viterbi decoder and IFFT/FFT.
  • cadence.se
    Software Architect
    Philips Semconductors Nov 1999 - Oct 2000
    Worked on defining the Software Architecture for Smart Phones. The architecture was a layered architecture with abstractions defined at OS layer, Platform layer and UI/Application layer. The co-processor engines were defined as components/tasks with dynamic interfacing on running a application chain. The OS used was VxWorks
  • cadence.se
    Project Manager
    Philips Semiconductors Feb 1997 - Oct 1999
    Working in Embedded Software Group. Providing solutions for Digital Televisions and DVD marketAudio Video Recording Platform layer software development for MPEG2 recorders. Modules worked on are digital encoder, on screen display, sub picture unit, mixer and display plane. The peripherals include1394 Link interface, UART, IIC and IDE interface. OS used was VxWorksWorked as a Project Manager for this project. I was part of the team to scope the project and define the requirements. For the part of the project to be executed at Bangalore, the project planning, resource management, execution and tracking was done by me. I also did the driver layer implementation for Digital Encode and Mixer modules. Digital Media BroadcastPlatform layer software development for Single Chip Set Top Box solutions. This project was a multi-site project with team size of three engineers. Our contribution was mainly for audio video graphics and channel decoder and demodulator. For this project the team traveled to Philips Semiconductor, Southampton. I was part of the team working on component integration, validation and verification.
  • cadence.se
    R&D Engineer
    Datapro Electronics Pvt Ltd Aug 1991 - Jul 1995
    Product DevelopmentEnergy MetersADSP2105 based and 80188 based digital energy meters developmentDigital Design, analog design, firmware, software/application, PCB, mechanical design, power management, calibration, certification, site installation, performance monitoringProduct revision for reliability and robustnessProduct line maintenance, mass production support

Milind Parab Education Details

  • cadence.se
    Indian Institute Of Technology, Kanpur
    Computer Science And Engineering
  • cadence.se
    Bharati Vidyapeeth
    Computer Science And Engineering
  • cadence.se
    Kendriya Vidyalaya Pune - Kv1
    English, Maths, Science

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